Senior Design Verification Engineer

We are looking for a Senior Design Verification Engineer with excellent design and functional verification skills to join our expanding team headquartered in Teknopark İstanbul, Turkey.

This is a challenging and varied role where you will be working on FPGA/ASIC projects. Working in a small team, you will be responsible from the design and verification of projects starting from architecture development. Experience in RTL coding using either VHDL, Verilog or System Verilog is essential. You will also be responsible from the RTL verification and FPGA validation of the projects.

• Minimum of 5 years' experience of Digital Design and/or Verification
• BS/MSc in Microelectronics Eng. related technical discipline
• Generating architecture documents based on system requirements
• Strong experience of RTL design and verification using SytemVerilog/UVM
• Assertion Based Verification (SVA) with experience of formal proofs for assertions
• Experience of FPGA prototyping preferably using Xilinx and/or Altera platforms
• Knowledge of scripting languages such as TCL, Perl, Python is a plus
• Ability to work in a team, and ability to work independently.
• Commitment for work plans and schedule
• Good communication skills
• Creativity, self learner, quick learner.
• Fluent English language
• Military service must be completed for male candidates

This is a unique opportunity to join an expanding company offering fantastic career and skills development opportunities.